WISC Systems: Aerospace Research Computer and IMS Max-2

The development of writable instruction set computer (WISC) technology was motivated by the intent to build calculus machines capable of high-speed interpretation of very-high-level languages, such as PROSE. This intent was first publicly discussed at a Rand Corporation Symposium in 1979. This objective was pursued during the decade of the 1980s, while new PC hardware was still dominated by 16-bit architecture which greatly limited the prospects for calculus-language interpretation.

The hardware of the Aerospace Research Computer (ARC), a 32-bit minicomputer containing four identical bit-slice RISC processors, was built during 1980-83, and operating micro-software was initiated during this period. An advanced discipline of software architecture & engineering called Metacybernetics was also formulated, aimed at the rapid generation and evolution of very-high-language “metacomputers” (virtual machines) to be hosted in the ARC.

The early 1980s was a period of active interest in high-level language computer architecture, and the ARC development team were active participants in symposia dedicated to this topic. The following papers on Synthetic Calculus were also presented at these sumposia:

Finally, in 1986 a spinoff from The Aerospace Corporation, International Meta Systems, was dedicated to the development of a PC-AT add-in board coprocessor containing one of the ARC microprocessors in 32-bit VLSI chip format. This board was intended to introduce the new MetaCalculus language, Fortran Calculus. However, fabrication problems at LSI Logic resulted in lower performance than originally planned, so the CEO, a former Aerospace executive not part of the original team, decided to take the company in another direction, ultimately toward emulation of other low-level hardware. As a “blank-slate” emulator of any machine, the WISC was marginally capable of this role. But that was never its intent.